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Mentor Graphics Introduces LeonardoSpectrum 2001.1d Synthesis for Field Programmable System-on-Chip Designs

WILSONVILLE, Ore.--(BUSINESS WIRE)--Sept. 5, 2001--Mentor Graphics Corporation (Nasdaq:MENT) today introduced LeonardoSpectrum(TM) 2001.1d (LS 2001.1d), the latest version of its market-leading field programmable gate array (FPGA) synthesis tool.

Focused on improving timing optimization based on accurate, physical data for FPGAs and improving synthesis quality of results, LS 2001.1d adds TimeCloser(TM) support for Altera(TM) Corporation's (Nasdaq:ALTR) multimillion gate APEX(TM) family. Concurrently, LS2001.1d builds upon existing TimeCloser support for Xilinx® (Nasdaq:XLNX) with specialized features enhancing automatic memory inference to the block and distributed RAMs throughout the Virtex(TM) device family.

TimeCloser for Altera APEX II Programmable Devices

Mentor Graphics has expanded its innovative TimeCloser technology to fit seamlessly into the Altera Quartus® II design flow and to support Altera's APEX devices, including the first three APEX EP2A series devices. For complex, high-speed designs with timing-critical functionality, the new TimeCloser flow provides a push-button methodology that helps designers meet performance goals in their Altera-based designs.

``Mentor Graphics worked closely with Altera to provide support for our new high-performance, high-density APEX II device family,'' said Tim Southgate, vice president of software and tools marketing for Altera Corporation. ``With the release of Leonardo Spectrum 2001.1d, engineers can now achieve excellent design performance when targeting Altera's next generation system-on-a-programmable-chip solution.''

Xilinx ISE Integration and Enhanced Memory Inferencing

LS 2001.1d now includes tight integration with the Xilinx Integrated Software Environment (ISE) 4.I. Xilinx's ISE environment provides a cockpit that easily integrates LeonardoSpectrum synthesis into their design flow and provides VHDL and Verilog flows, schematic and critical path viewing and support for CORE Generator files in the file list.

For the Virtex, Virtex-E and Virtex II families, LS 2001.1d broadens implementation coverage of single and dual-port RAMs/ROMs through enhancements that provide improved recognition of memory structures across a range of coding styles. Also, LS 2001.1d now enables users to control usage of either block or distributed RAM resources through use of attributes, allowing consideration of memory size and speed tradeoffs, which can help designers produce optimal memory implementations.

``We are pleased that Mentor Graphics continues to develop innovative functionality that vastly improves quality of results for the Virtex-II family,'' said Rich Sevcik senior vice president and general manager for Xilinx, Incorporated. ``With each release, Mentor extends its offering by providing Virtex-II designers sophisticated solutions they need to achieve high performance for complex applications, such as digital signal processing designs.''

Operating System Enhancements

LeonardoSpectrum 2001.1d also now includes support for Solaris 2.7 and 2.8, as well as HP-UX 11.0 operating systems. Customers should refer to both the Sun and HP web sites to acquire the latest updates to ensure optimal support for these platforms.

Pricing and Availability

LeonardoSpectrum 2001.1d is available immediately. U.S. list price for LS 2001.1d Level 2 starts at $8,950. TimeCloser technology is available in the Level 3 version of the product. U.S. list price starts at $17,500. Supported platforms include Windows®NT, 98 and 2000, Solaris(TM)and HP-UX platforms. LS 2001.1d can also be found in Mentor Graphics®FPGA Advantage®, which provides designers with a complete FPGA design flow including best-in-class design-entry, simulation and synthesis capabilities.

About Mentor Graphics Corporation

Mentor Graphics Corporation (Nasdaq:MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of more than $600 million and employs approximately 2,975 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: www.mentor.com. For information on LeonardoSpectrum products, please call 408/487-7410, e-mail: sales@exemplar.com, or visit www.exemplar.com.

Mentor Graphics and FPGA Advantage are registered trademarks of Mentor Graphics Corporation and LeonardoSpectrum and TimeCloser are trademarks of Mentor Graphics Corporation. Windows is a registered trademark of Microsoft Corp. All other company and/or product names are the trademarks and/or registered trademarks of their respective owners.


Contact:
     Mentor Graphics
     Keri Wilson, 503/685-1359
     keri_wilson@mentor.com
        or
     Benjamin Group/BSMG Worldwide
     Jason Khoury, 415/352-2628 x172
     jkhoury@bsmg.com

Copyright 2001, Internet Business Systems, Inc.
1-888-44-WEB-44 --- marketing@ibsystems.com